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 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1 2109876543212109876543210987654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16646
Product Features
* * * * * * * * PI74ALVCH16646 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25C Bus Hold retains last active bus state during 3-STATE, eliminating the need for external pullup resistors Industrial operation at 40C to +85C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)
Product Description
16-Bit Bus Transceiver and Register with 3-STATE Outputs
Pericom Semiconductors PI74ALVCH series of logic circuits are produced in the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed. The PI74ALVCH16646 is a 16-bit bus transceiver and register designed for 2.3V to 3.6V VCC operation. It can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate Clock (CLKAB or CLKBA) input. Four fundamental bus-management functions can be performed. Output Enable (OE) and Direction Control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The Select Control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. Circuitry used for Select Control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE is LOW. In the isolation mode (OE HIGH), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Logic Block Diagram
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
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PS8102A 10/07/98
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PI74ALVCH16646 16-Bit Bus Transceiver and Register with 3-STATE Outputs
Product Pin Configuration
1DIR 1CLKAB 1SAB
Product Pin Description
Pin Name D e s cription O utput Enable Inputs (Active LO W) Direction Control
56 55 54
1OE 1CLKBA 1SBA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
xO E xDIR
GND
1A1 1A2
VCC
1A3 1A4 1A5
53 52 51 56-PIN V56 50 A56 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
GND
1B1 1B2
xCLK AB, xCLK BA Clock Pulse Inputs xSAB, xSBA xAx xBx GND VCC Select Control Inputs Data Register A Inputs Data Register B O utputs Data Register B Inputs Data Register A O utputs Ground Power
VCC
1B3 1B4 1B5
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
VCC
2A7 2A8
VCC
2B7 2B8
GND
2SAB 2CLKAB 2DIR
GND
2SBA 2CLKBA 2OE
Truth Table(2)
Inputs Function Store A, B Unspecified (1) Store B, A Unspecified (1) Isolation Store A and B Data Real Time A Data to B Bus Stored A Data to B Bus Real Time B Data to A Bus Stored B Data to A Bus xOE X X H H L L L L xDIR X X X X H H L L xCLKAB X H or L X H or L X X xCLKBA X H or L X X X H or L xSAB X X X X L H X X xSBA X X X X X X L H Data I/O xAx Input Unspecified (1) Input Disable Input Input Input Output Output xBx Unspecified (1) Input Input Disable Input Output Output Input Input
Note: 1. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. 2. H = High Voltage Level X = Don't Care L = Low Voltage Level = LOW-to-HIGH Transition 2
PS8102A 10/07/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16646 16-Bit Bus Transceiver and Register with 3-STATE Outputs
REAL-TIME TRANSFER BUS B TO A
REAL-TIME TRANSFER BUS A TO B
BUS A
BUS B
BUS A
BUS B
xDIR L
xOE xCLKAB xCLKBA L X X
xSAB X
xSBA L
xDIR H
xOE xCLKAB xCLKBA L X X
xSAB L
xSBA X
STORAGE FROM A AND/OR B
TRANSFER STORES DATA TO A AND/OR B
BUS A
BUS B
BUS A
BUS B
xDIR X X X
xOE xCLKAB xCLKBA X X X X H
xSAB X X X
xSBA X X X
xDIR(1) xOE xCLKAB xCLKBA L L X H or L H L H or L X
xSAB X H
xSBA H X
Note: 1. Cannot transfer data to A bus and B bus simultaneously.
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PS8102A 10/07/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16646 16-Bit Bus Transceiver and Register with 3-STATE Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ 65C to +150C Ambient Temperature with Power Applied .......................... 40C to +85C Input Voltage Range, VIN .................................................... 0.5V to VCC +4.6V Output Voltage Range, VOUT ............................................. 0.5V to VCC +0.5V DC Input Voltage ................................................................... 0.5V to +5.0V DC Output Current ................................................................................ 50 mA Power Dissipation ................................................................................... 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%)
Parame te rs VCC VIH(3) VIL(3) VIN(3) VOUT(3) D e s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 IOH = - 100mA, VCC = Min. to Max. O utput HIGH Voltage VIH = 1.7V, IOH = - 6mA, VCC = 2.3V VIH = 1.7V, IOH = - 12mA, VCC = 2.3V VIH = 2.0V, IOH = - 12mA, VCC = 2.7V VIH = 2.0V, IOH = - 12mA, VCC = 3.0V VIH = 2.0V, IOH = - 24mA, VCC = 3.0V IOL = 100mA, VIL = Min. to Max. VOL O utput LO W Voltage VIL = 0.7V, IOL = 6mA, VCC = 2.3V VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC = 3.0V O utput HIGH Current VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 2.3V VCC = 2.7V VCC = 3.0V
4
Te s t Conditions (1)
M in. 2.3 1.7 2.0
Typ.(2)
M ax. 3.6
Units
Input LO W Voltage Input Voltage O utput Voltage
0.7 0.8 VCC VCC
VCC - 0.2 2.0 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 - 12 - 12 - 24 12 12 24
PS8102A 10/07/98
V
VOH
IOH(3)
mA
IOL(3)
O utput LO W Current
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16646 16-Bit Bus Transceiver and Register with 3-STATE Outputs
M in. Typ.(2) M ax. 5 45 - 45 75 - 75 500 10 40 750 3 6 7 pF mA Units
DC Electrical Characteristics-Continued (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%)
Parame te rs De s cription IIN Input Current Te s t Conditions (1) VIN = VCC or GND, VCC = 3.6V VIN = 0.7V, VCC = 2.3V IIN (HOLD) Input Hold Current VIN = 1.7V, VCC = 2.3V VIN = 0.8V, VCC = 3.0V VIN = 2.0V, VCC = 3.0V VIN = 0 to 3.6V, VCC = 3.6V IOZ ICC DICC Output Current (3- STATE Outputs) Supply Current Supply Current per Input @ TTL HIGH Control Inputs Data Inputs Outputs VOUT = VCC or GND, VCC = 3.6V VCC = 3.6V, IOUT = 0mA, VIN = GND or VCC VCC = 3.0V to 3.6V One Input at VCC - 0.6V Other Inputs at VCC or GND VIN = VCC or GND, VCC = 3.3V VO = VCC or GND, VCC = 3.3V
CI CO
Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient and maximum loading. 3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements
Parame te rs FCLOCK tW tSU tH D e s cription Clock Frequency Pulse Duration Setup Time Hold Time CLK AB or CLK BA HIGH or LO W A Before CLK AB or B Before CLK BA A After CLK AB or B After CLK BA Conditions (1) VCC = 2.5V 0.2V M in.(2) 0 3.3 CL = 50pF RL = 500W 1.6 0.6 M ax. 150 VCC = 2.7V M in.(2) 0 3.3 1.7 0.4 M ax. 150 VCC = 3.3V 0.3V M in.(2) 0 3.3 1.4 0.7 M ax. 150 Units MHz
ns
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PS8102A 10/07/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16646 16-Bit Bus Transceiver and Register with 3-STATE Outputs
Switching Characteristics over Operating Range(1)
Parame te rs fMAX tPD tPD tPD tEN tDIS tEN tDIS Dt/Dv(3) A or B CLK AB or CLK BA SAB or SBA OE OE DIR DIR D e s cription Input Transition Rise or Fall 0 10 0 10 0 10 ns/V A or B CL = 50pF RL = 500W 1.8 1.0 1.7 B or A 1.0 From (INPUT) To Conditions (1) (OUTPUT) VCC = 2.5V 0.2V M in.(2) 150 4.8 5.6 6.8 6.5 5.7 7.8 6.5 M ax. VCC = 2.7V M in.(2) 150 4.5 5.2 6.4 6.2 5.0 6.2 6.0 1.4 1.0 1.1 1.0 M ax. VCC = 3.3V 0.3V M in.(2) 150 3.9 4.5 5.3 5.1 4.7 5.1 5.3 ns M ax. Units MHz
Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Recommended operating condition.
Operating Characteristics, TA = 25C
Parame te r CPD Power Dissipation Capacitance Outputs Enabled Outputs Disabled Te s t Conditions VCC = 2.5V 0.2V Typ. 39 10 43 12 VCC = 3.3V 0.3V Units
CL = 50pF, f = 10 MHz
pF
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
6
PS8102A 10/07/98


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